Date: Sat, 11 Feb 2017 16:00:00 -0500
<h3>Summary</h3> <p>As circuits and electronic components become more complex, visual circuit building tools are more difficult to use effectively. If you wish that you could just write your circuits in Python then you’re in luck! Dave Vandenbout created a library called SKIDL that brings the power and flexibility of Python to the realm of Electrical Engineering and he tells us all about it in this weeks show.</p> <h3>Preamble</h3> <ul> <li>Hello and welcome to Podcast.__init__, the podcast about Python and the people who make it great.</li> <li>I would like to thank everyone who has donated to the show. Your contributions help us make the show sustainable.</li> <li>When you’re ready to launch your next project you’ll need somewhere to deploy it. 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Visit <a href="https://discourse.pythonpodcast.com?utm_source=rss&utm_medium=rss">discourse.pythonpodcast.com</a> for your opportunity to find out about upcoming guests, suggest questions, and propose show ideas.</li> <li>Your host as usual is Tobias Macey and today I’m interviewing Dave Vandenbout about <a href="https://xesscorp.github.io/skidl/docs/_site/index.html?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">SKIDL</a>, a library for designing and validating circuit layouts.</li> </ul> <h3>Interview</h3> <ul> <li>Introductions</li> <li>How did you get introduced to Python?</li> <li>Can you describe what SKIDL is and the problem that you were trying to solve when you first started it?</li> <li>Most of my experience designing circuits has been done using a graphical tool. If you are using Python for the entire layout does it become difficult to understand the overall circuit without the visual representation? <ul> <li>Is there a way to generate a circuit diagram from the SKIDL code for a visual reference?</li> </ul> </li> <li>It seems that there is a substantial amount of electrical knowledge required to be able to design and build schematics in code. For someone who is more of a hobbyist or is just starting to work with circuit design are there any facilities of SKIDL to assist with that understanding?</li> <li>What does the testing and validation process of a generated circuit look like?</li> <li>What does the internal architecture of SKIDL look like and what are some of the biggest challenges that you have faced while building it?</li> <li>For the generated netlist does SKIDL take into account voltage losses due to the lengths of the traces in the final PCB and does it have any facilities to optimize the overall layout for space and efficiency?</li> <li>Sometimes a circuit board is meant to be accessible for maintenance or even display purposes. Is it possible to specify the arrangement of components to make them more aesthetically pleasing or to space them so that they are easier to access physical interface ports (e.g. GPIO pins or I2C buses)?</li> <li>What are some of the most interesting or surprising uses of SKIDL that you have seen?</li> </ul> <h3>Keep In Touch</h3> <ul> <li><a href="http://www.xess.com/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">Website</a></li> <li><a href="https://xesscorp.github.io/skidl/docs/_site/index.html?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">Documentation</a></li> </ul> <h3>Picks</h3> <ul> <li>Tobias <ul> <li><a href="http://amzn.to/2kT6BMM?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">Samsonite Tectonic Backpack</a></li> </ul> </li> <li>Dave <ul> <li><a href="http://amzn.to/2lBrpbp?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">Ball 4</a> by Jim Bouton</li> </ul> </li> </ul> <h3>Links</h3> <ul> <li><a href="http://kicad-pcb.org/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">KiCad</a></li> <li><a href="https://en.wikipedia.org/wiki/Gerber_format?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">Gerber Files</a></li> <li><a href="https://en.wikipedia.org/wiki/Application-specific_integrated_circuit?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">ASIC</a></li> <li><a href="https://en.wikipedia.org/wiki/Field-programmable_gate_array?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">FPGA</a></li> <li><a href="https://sourceforge.net/p/phdl/wiki/Home/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">PHDL</a></li> <li><a href="http://www.myhdl.org/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">MyHDL</a></li> <li><a href="https://en.wikipedia.org/wiki/VHDL?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">VHDL</a></li> <li><a href="https://en.wikipedia.org/wiki/SPICE?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">SPICE Simulator</a></li> </ul> <p>The intro and outro music is from Requiem for a Fish <a href="http://freemusicarchive.org/music/The_Freak_Fandango_Orchestra/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">The Freak Fandango Orchestra</a> / <a href="http://creativecommons.org/licenses/by-sa/3.0/?utm_source=rss&utm_medium=rss" rel="noopener" target="_blank">CC BY-SA</a><img alt="" height="0" src="https://analytics.boundlessnotions.com/piwik.php?idsite=1&rec=1&url=https%3A%2F%2Fwww.pythonpodcast.com%2Fepisode-96-skidl-with-dave-vandenbout%2F&action_name=SKIDL+with+Dave+Vandenbout+-+Episode+96&urlref=https%3A%2F%2Fwww.pythonpodcast.com%2Ffeed%2F&utm_source=rss&utm_medium=rss" style="border: 0; width: 0; height: 0;" width="0" /></p>